Selected Publications (1995-2006) (updated 6/13/2006)
(Check the Projects pages for more information related to the most current publications)

Journal/Conference Publications

2006

Konrad J. Kulikowski, Alexander Smirnov, Alexander Taubin. "Automated Dsign of Cryptographic Devices Resistant to Multiple Side-Channel Attacks". Workshop on Cryptographic Hardware and Embedded Systems 2006 (CHES'06) Yokohama, Japan. October 2006

I.Honkala, M.G.Karpovsky, L.B.Levitin, "On Robust and Dynamic Identifying Codes", IEEE Trans Info Theory, Feb 2006, pp599-613

Smirnov A., Taubin A., and Karpovsky M., "On Automatic Synthesis of Data Dependent Micropipelines" Proc. Int. Workshop on Logic and Synthesis, 2006

I. Levin, T. Keren, G. Kolotov, M.G. Karpovsky, "PIECEWISE LINERIZATION OF LOGIC FUNCTIONS" , Proc Int Workshop on Spectral Techniques, 2006

R. Stankovic, Jaakko Astola, Mark Karpovsky, "SOME HISTORIC REMARKS ON THE SAMPLING THEOREM", Proc Int Workshop on Spectral Techniques, 2006

G.Gaubatz, B.Sunar, M.G.Karpovsky, "Robust Residue Codes for Fault-Tolerant Public-Key Arithmetic", Proc of Int. Workshop on Fault Detection and Tolerance in Cryptography, 2006

Konrad J. Kulikowski, Mark Karpovsky, Alexander Taubin. "DPA on Faulty Cryptographic Hardware and Countermeasures". Workshop on Fault Diagnosis and Tolerance in Cryptography 2006 (FTDC'06) Yokohama, Japan. October 2006.

Konrad J. Kulikowski K, Mark Karpovsky, Alexander Taubin. "Power Attacks on Secure Hardware Based on Early Propagation of Data". International On-Line Testing Symposium (IOLTS'06) Lake of Como, Italy, July 2006.

I.Honkala, M.G.Karpovsky, L.B.Levitin, "On Robust and Dynamic Identifying Codes", IEEE Trans Info Theory, Feb 2006, pp599-613

F.De Pelegrini, D.Starobinski, M.G.Karpovsky, L.B.Levitin, "Scalable Cycle Breaking Algorithms For Gigabit Ethernet Backbones", Journal of Optical Networking, Vol.5, N.1 Jan. 2006, pp.1-23

2005

Levin I., Stankovic R., Karpovsky M., Astola J., (2005) "Construction of Planar BDDs by Using Linearization and Decomposition", Proc. of Fourteenth International Workshop on Logic and Synthesis, Lake Arrowhead, California, pp. 132-139.

A.Smirnov, A.Taubin, M.Su, and M.G.Karpovsky, An Automated Fine-Grain Pipelining Using Domino Style Asynchronous Library, Proc. ACSD 2005 : Fifth International Conference on Application of Concurrency to System Design

Konrad J. Kulikowski, Mark Karpovsky, Alexander Taubin , "Robust Codes for Fault Attack Resistant Cryptographic Hardware", Workshop on Fault Diagnosis and Tolerance in Cryptography 2005 (FTDC05), September 2005.

Konrad J. Kulikowski, Mark Karpovsky, Alexander Taubin, " Memories with Robust Self Error Detection Invariant to Error Distributions", In Informal Proceedings of the 10th European Test Symposium (ETS05), May 2005.

Konrad J. Kulikowski, Ming Su, Alexander Smirnov, Alexander Taubin, Mark Karpovsky, and Daniel MacDonald, "Delay Insensitive Encoding and Power Analysis: A Balancing Act", Proc. 11th Int. Symp. on Asynchronous Circuits and Systems, 2005

R.Stanckovic, and M.G.Karpovsky, "Remarks on Calculation of Autocorrelation on Finite Dyadic Groups by Local Transformations of Decision Diagrams", Lecture Notes Springer and Verlag, 2005

R.S.Stankovic, J.T.Aastola and M.G.Karpovsky, "Remarks on History of Abstract Harmonic Analysis", Proc. Fifth Int. Workshop on Spectral Methods and Signal Processing, 2005  

2004

M. Karpovsky and A. Taubin. New Class of Nonlinear Systematic Error Detecting Codes. IEEE Transactions on Information Theory. IEEE Trans Info Theory, Vol 50, No.8, 2004, pp.1818-1820 .

M. Karpovsky, K. Kulikowski and A. Taubin. Differential Fault Analysis Attack Resistant Architectures for the Advanced Encryption Standard. CARDIS 04: Sixth smart Card Research and Advanced Application IFIP Conference, August, 2004.

Karpovsky, M.G., Stankovic, R.S., Moraga, C., ”Spectral techniques in binary and multiple-valued switching theory, a review of results in the decade 1991-2000”, Multiple-Valued Logic and Soft Computing, Vol. 10, N. 3, 2004, 261-286

M. Karpovsky, K. Kulikowski and A. Taubin. Robust Protection against Fault-Injection Attacks of Smart Cards Implementing the Advanced Encryption Standard.  DSN04: The International Conference on Dependable Systems and Networks, June, 2004

Smirnov A., Taubin A., Karpovsky M. and Rozenblyum L. Gate Transfer Level Synthesis as an Automated Approach to Fine-Grain Pipelining in Workshop on Token Based Computing (ToBaCo). June 22, 2004. Bologna, Italy.

Smirnov A., Taubin A., and Karpovsky M. Automated Pipelining in ASIC Synthesis Methodology: Gate Transfer Level. in IWLS 2004 Thirteenth International Workshop on Logic and Synthesis. June 2-4, 2004. Temecula, California, USA.

Francesco de Pellegrini, David Starobinski, Mark Karpovsky and Lev Levitin, ``Scalable Cycle-Breaking Algorithms for Gigabit Ethernet Backbones,'' IEEE INFOCOM 2004, Hong Kong, March 2004

M.G.Karpovsky, R.Stancovic and J.Aastola, "Construction of Linearly Transformed Planar BDDs by Walsh Coefficients", Proc. ISCAS, 2004

Kolotov Y., Levin, I., Ostrovsky V., Karpovsky M.G, "Software Tool for BDD Optimizing by Using Autocorrelation Functions". Proc. of the 23-th IEEE Convention of EEEI, 2004, pp129-132.

I.Levin, M.G.Karpovsky, S.Ostanin, V.Sinelnikov, "Designing Circuits Detecting Different Types of Faults", WSEN Transactions on Electronics, Issue 2, Vol. 1, Apr 2004, pp.396-404

Stankovic, R.S., Karpovsky, M.G., and J.T. Aastola, "Reduction of the Number of Coefficients in Arithmetic Expressions by Autocorrelation Functions", Proc. 2004 International Workshop on Spectral Methods and Multirate Signal Processing, SMMSP2004

2003

A. Smirnov and A.Taubin, Weaver – a synthesis flow (beta version) for fine grain pipelining based on a commercial synchronous engine. IEEE International Symposium on Advanced Research in Asynchronous Circuits and Systems, CAD Tutorial Program. May 2003.

D. Starobinski, A. Trachtenberg, and S. Agarwal, "Efficient PDA synchronization", IEEE Trans. on Mobile Computing 2:1, January-March 2003

Rajesh Krishnan and David Starobinski, ``Message-Efficient Self-Organization of Wireless Sensor Networks,'' to appear in IEEE WCNC 2003.

David Starobinski, Mark Karpovsky, and Lev Zakrevski, ``Application of Network Calculus to General Topologies using Turn-Prohibition,'' to appear in IEEE/ACM Transactions on Networking.

Saikat Ray, Jeffrey Carruthers, and David Starobinski, ``RTS/CTS-induced Congestion in Ad-Hoc Wireless LANs,'' IEEE WCNC 2003.

Ray S., Ugrangsi R., De Pellegrini F., Trachtenberg A., Starobinski D., "Robust Location Detection for Emergency Sensor Networks", proceedings of IEEE INFOCOM 2003, San Francisco, CA.

2002

M.G. Karpovsky, M.Mustafa, R.Mathur,"Fault-Tolerant Unicast Wormhole Routing in Irregular Computer Networks",Proc. of the Conference on Parallel and Distributed Computing and Systems, PDSC 2002.

L.B. Levitin, M.G. Karpovsky, "Deadlock Prevention in Networks Modeled as Weighted Graphs", Proc. ICINSAT-2002 Conf, 2002.

R. Stancovic, M.G. Karpovsky, "Remarks on the Number of Logical Networks with the same Complexity Derived from Spectral Decision Diagrams". Proc. Int. TICS Workshop on Spectral Methods and Multirate Signal Processing, SMMSP'02, Toulouse, France, September 7-8, 2002, pp163-170.

I. Levin, V. Ostrovsky, S. Ostanin, M.G. Karpovsky, "Self-Checking Sequential Circuits with Self-Healing", Proc of VLSI Symposium GLSVLSI-2002, 2002.

M.G.Karpovsky, R.Stancovic, J. Aastola, "Reduction of Sizes of Decision Diagrams by Autocorrelation Fuctions", IEEE Trans on Computers, 2002.

I. Levin, M. G. Karpovsky, S. Ostanin, "Sequential Circuits applicable for Detection of Faults", Proc. of 8th Int.Workshop on On-Line Testing, 2002.

I.Honkala, M.G.Karpovsky, S.Litsyn "Cycles Identifying Vertices and Edges in Binary Hypercubes and Two-Dimensional Tori", Discrete Applied Mathematics,2002.

D.Starobinski, M.G.Karpovsky, L.Zakrevsky "Applications of Network Calculus to General Topologies" IEEE/ACM Transactions on Networking, 2002.

M. Karpovsky, R. Stankovic, C.Moraga, "Spectral Techniques in Binary and Multiple-Valued Switching Theory", International Journal on Multiple-Valued Logic,  2002.

D. Starobinski, M.G.Karpovsky, L. Zakrevski, "Application of Network Calculus to General Topologies Using Turn Prohibitions", Proc. INFOCOM 2002.

A. Trachtenberg, Designing Lexicographic Codes with a Given Trellis Complexity, IEEE Trans. Inf. Theory, January 2002.

T. Etzion, A. Trachtenberg, and A. Vardy, Which Codes have Cycle-Free Tanner Graphs? IEEE Trans. Inf. Theory, 45:6.

J. Cortadella, M. Kishinevsky, S.M. Burns, A. Kondratyev, L. Lavagno, K.S. Stevens, A. Taubin and A. Yakovlev, Lazy transition systems and asynchronous circuit synthesis with relative timing assumptions. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 21, No. 2, Feb. 2002, pp. 109-130.

A. Taubin and M. Karpovsky Devices Resistant to Attacks. Design Methodology. 2002 Fall IEEE Conference on Technologies for Homeland Security, November 13-14, 2002

A.Taubin, K. Fant and J. McCardle. Design of Delay-Insensitive Three Dimension Pipeline Array Multiplier for Image Processing, Proceedings, 2002 IEEE International Conference on Computer Design: VLSI in Computers and Processors. ICCD’2002, p.p.104-111

A. Kondratyev, L. Neukom, O. Roig, A. Taubin and K. Fant Checking Delay-Insensitivity: 104 Gates and Beyond. In International Symposium on Advanced Research in Asynchronous Circuits and Systems, April 2002, p. 149-157

S. Agarwal, D. Starboinski, and A. Trachtenberg, "On the scalability of data synchronization protocols for PDAs and mobile devices",IEEE Network: Scalability in Comm.Networks, July, 2002.

A. Trachtenberg, "Designing Lexicographic Codes with a Given Trellis Complexity", IEEE Trans. Inf. Theory, January 2002:  

2001

Y. Minsky, A. Trachtenberg, and R. Zippel, Set Reconciliation with Nearly Optimal Communication Complexity, submitted. 2001

M.G.Karpovsky, R.Stankovic, C.Moraga, "Recent Results in Applications of Spectral Techniques in Binary and Multiple-Valued Switching Theory", Proc of Int. Conf on Computer Intelligence and Information Technologies, 2001.

I.Honkala, M.G.Karpovsky, S.Litsyn, "On Identification of Vertices and Edges Using Cycles", Proc. AAECC-14, 2001, pp308-314.

M. Karpovsky, L. Levitin, A. Trachtenberg, "Data Verification and Reconciliation with Generalized Error Control Codes", Proc. of 39th Annual Allerton Conference on Communication, Control, and Computing, 2001.

A. Trachtenberg, M. Karpovsky, "Space-Time Turn Prohibitions for Low Density Parity-Check Codes", Proc. of 39th Annual Allerton Conference on Communication, Control, and Computing, 2001.

M. Karpovsky, L. Zakrevski, M. Mustafa, A. Agarwal, "The Generalized Turn Prohibition Model for Multicast Routing in Irregular Networks," Proc. of Thirteenth IASTED International Conference on Parallel and Distributed Computing and Systems (PDCS 2001).

M. Karpovsky, R. Stankovic, J. Astola, "Construction of Linearly Transformed Binary Decision Diagrams by Autocorrelation Functions", Proceedings of International TICSP Workshop on Spectral Methods and Multirate Signal Processing, SMMSP'2001, Pula, Croatia, 2001.

I. Levin, V. Sinelnikov, M. Karpovsky, "Synthesis of ASM-based Self-Checking Controllers", Proceedings of International Conference on Digital Systems Design, DSD'2001.

P.K.Lala, M.G.Karpovsky, "An Approach for Designing On-line Testable State Machines", Proc. International Workshop on On-line Testing, 2001.

U.Blass, I.Honkala, M.G.Karpovsky, S. Litsyn, "Short Dominating Paths and Cycles in Hypercubes", Annals of Combinatorics 5, 2001.

David Starobinski and David Tse, "Probabilistic Methods for Web Caching" , Performance Evaluation , Vol 46, Nos. 2-3, pp. 125-137, October 2001.

2000

I. Levin, M. Karpovsky, V. Sinelnikov, "Architecture of FPGA-based Concurrent Checking FSM", Proceedings of the Third International Electronic Circuits and Systems Conference, Bratislava, Slovakia, September 5-7, 2000.

M.G.Karpovsky, R.S.Stankovic, J.T.Astola, "Spectral Techniques for Design and Testing of Computer Hardware", Keynote Paper, Proc. First Int. Workshop on Spectral Techniques and Logical Design for Future Digital Systems, Tampere, Finland, June, 2000.

David Starobinski and Moshe Sidi, "Modeling and Analysis of Power-Tail Distributions via Classical Teletraffic Methods" ,Queueing Systems (QUESTA), Vol. 36, Nos. 1-3, pp. 243-267, November 2000.

S. Jaiswal, L. Zakrevski, M.G. Karpovsky, "Wormhole Message Routing in Networks of Workstations",  PDCS-2000.

Michiel Ligthart, Karl Fant, Ross Smith, Alexander Taubin, Alex Kondratyev Asynchronous Design Using Commercial HDL Synthesis Tools. In International Symposium on Advanced Research in Asynchronous Circuits and Systems, April 2000.

1999

M.G. Karpovsky, K. Chakrabarty, L.B. Levitin, D. Avresky, "On the Covering of Vertices for Fault-Diagnosis in Hypercubes", Information Processing Letters, 69, 1999, pp.99-103.

L. Zakrevski, M.G. Karpovsky, "Fault-Tolerant Routing in Computer Networks", Proc. Int. Conf. On Parallel and Distributed Processing Techniques and Applications, vol. 4, 1999, pp.2279-2287.

L. Zakrevski, S. Jaiswal, L.B. Levitin, M.G. Karpovsky, "A New Method for Deadlock Elimination in Computer Networks with Irregular Topologies", Proc. Int. Conf. On Parallel and Distributed Computer Systems, 1999.

L. Zakrevski, S. Jaiswal, M.G. Karpovsky, "Unicast Message Routing in Communication Networks with Irregular Topologies", Proc. of CAD-99, 1999.

A. Taubin, A. Kondratyev, J. Cortadella, and L. Lavagno. Behavioral transformations to increase the noise immunity of asynchronous specifications. In International Symposium on Advanced Research in Asynchronous Circuits and Systems, pages 36-47, April 1999.

A. Taubin, A. Kondratyev, J. Cortadella, and L. Lavagno. Crosstalk noise avoidance in asynchronous circuits. In Proceedings of the A CM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TA U), pages 123-128, March 1999.  

1998

V. Iyenger and K. Chakrabarty. An efficient finite-state machine implementation of Huffman decoders. Inf. Processing Lett. , pp. 271-275, 1998.

M. G. Karpovsky, K. Chakrabarty and L. B. Levitin. A new class of codes for identification of vertices … IEEE Trans. On Inf. Theory, March 1998.

Lev. B. Levitin. Energy requirements in quantum communication. Int. J. of Theoretical Physics, 1998.

Lev. B. Levitin. Energy cost of information transmission (along the path of understanding). Physica D., 1998.

N. Margolus and Lev B. Levitin. The maximum speed of dynamic evolution. Physica D., 1998 .

M. G. Karpovsky. Integrated on-line and off-line error detection mechanism. VLSI J., 1998.

Iyengar, K. Chakrabarty and B. T. Murray. Built-in self-testing of sequential circuits … VLSI Test Symp., 1998.

M. Kishinevsky, A. Kondratyev, L. Lavagno, A. Saldanha, and A. Taubin. Partial scan de­lay fault testing of asynchronous circuits. IEEE Transactions on Computer-Aided Design, 17(11):1184-1199, 1998.

A. Kondratyev, M. Kishinevsky, A. Taubin, J. Cortadella, and L. Lavagno. The use of Petri nets for the design and verification of asynchronous circuits and systems. Journal of Circuits, Systems, and Computers, 8(1):67-118, 1998.

A. Taubin, M. Kishinevsky, and A. Kondratyev. Deadlock prevention using Petri nets and their unfoldings. International Journal of Advanced Manufacturing Technology, 14(10):750-759,1998.

A. Kondratyev, M. Kishinevsky, A. Taubin, and S. Ten. Analysis of Petri nets by ordering relations in reduced unfoldings. Formal Methods in System Design, 12(1):5-38, 1998.

A. Kondratyev, J. Cortadella, M. Kishinevsky, L. Lavagno, A. Taubin, and A. Yakovlev. Lazy transition systems: application to timing optimization of asynchronous circuits. In Proceedings of the International Conference on Computer-Aided Design, pages 324-331, November 1998. 

A. Kondratyev, J. Cortadella, M. Kishinevsky, L. Lavagno, A.Taubin, and A. Yakovlev. Identifying state coding conflicts in asynchronous system specifications using Petri net unfoldings. In Proc. of the International Conference on Application of Concurrency to System Design (CSD '98), pages 152-163, Fukushima, Japan, March 1998.

1997

D. Avresky, V. Shurbanov and R. Horst. The effect of router arbitration policy Microprocessors and Microsystems, Elsevier Science, 1997.

D. Avresky. Reconfiguration of faulty hypercubes. Int. J. of Computer Systems Sc. and Engineering, CRL Publishing Ltd., United Kingdom, 1997.

D. Avresky, S. Geoghegan and P. K. Tapadiya. A software-based fault injection tool – SOFIT. Int. J. of Computer Systems Sc. and Engineering, CRL Publishing Ltd., United Kingdom, 1997.

D. Avresky and C. Cunningham. Single source fault-tolerant broadcasting Microprocessors and Microsystems, Elsevier Science, 1997.

D. Avresky. Formal verification of behavioral and timing properties protocols. Computer Communications J., 1997.

K. Chakrabarty and J. P. Hayes. Zero-aliasing space compaction. IEEE Trans. On VLSI Systems, 1997.

K. Chakrabarty and J. P. Hayes. On the quality of accumulator-based compaction of test responses. IEEE Trans. on CAD, 1997.

D. Das and M. G. Karpovsky. Exhaustive and near exhaustive memory testing. J. of Electronic Testing: Theory and Applications, pp. 215-229, 1997.

V. N. Yarmolik, A.I. Yanushkevich and M. G. Karpovsky. IDDQ testing of systolic CMOS networks. Micro-electronics Bulletin Russian Acad. of Sc., pp. 25-29, 1997.

A.Zakrevskij and L. Zakrevski. Synthesis of the shortest Reed-Muller realization. Doklady of the Acad. of Sc. Of Belarus, pp. 5-9, 1997.

A.Zakrevskij and L. Zakrevski. Diagnosis of stuck-at faults in EXOR- circuits. Automatic and Computer Technik, pp. 23-31, 1997.

Moshe Sidi and David Starobinski, "New Call Blocking versus Handoff Blocking in Cellular Networks", ACM Journal of Wireless Networks, Vol. 3, No. 1, pp. 15-27, March 1997.

V. Shurbanov, D. Avresky, R. Horst and (et al). A scalability study of ServerNet topologies. Int. Conf. On Parallel and Distributed systems, 1997.

D. Avresky and S. Vassilaras. Automated formal verification … Int. Conf. On Computers and Communications, 1997.

C. Cunningham and D. Avresky. Dynamic fault recovery … Int. Workshop on Fault-Tolerant, Parallel and Distributed Systems, 1997.

K. Chakrabarty, B. T. Murray, J. Liu and M. Zhu. Test width compression. Int. Test Conf., pp. 328-337, 1997.

V. Iyengar, K. Chakrabarty and B. T. Murray. Test set encoding for efficient sequential circuit testing. Instr. And Meas. Tech. Conf., pp. 1442-1447, 1997.

V. Iyengar, K. Chakrabarty and B. T. Murray. Built-in self-testing with complete fault coverage … IEEE North Atlantic Test Workshop, pp. 15-18, 1997.

L. Levitin. Remarks on conditional density matrix, entropy and information. Int. Workshop on Quantum Computation, 1997.

L. Levitin. Minimum energy in information transmission. Int. Conf. On CAD of Discrete Devices, pp. 98-102, 1997.

A.Zakrevskij and L. Zakrevski. Efficient algorithms for minimization of polynomial representation … Int. Workshop on VLSI Systems, pp. 49-50, 1997.

A. Zakrevskij and L. Zakrevski. Fast algorithm for minimizing Reed-Muller expansions … Int. Symposium on Multiple-Valued Logic, pp. 61-65, 1997.

A. Taubin, A. Kondratyev, and M. Kishinevsky. Applications of Petri nets unfoldings to asynchronous design. In 1997 IEEE International Conference on Systems, Man, and Cybernetics, volume 5, pages 4279-4284, Orlando, Florida, October 1997.

M. Kishinevsky, J. Cortadella, A. Kondratyev, L. Lavagno, A. Taubin, and A. Yakovlev. Coupling asynchrony and interrupts: Place chart nets and their synthesis. In International Conference on Application and Theory of Petri Nets, Proc. 18th Int. Conference, volume 1248 of Lecture Notes in Computer Science, pages 328-347, Toulouse, France, June 1997. Springer Verlag.

Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alex Saldanha, and Alexander Taubin. Partial scan delay fault testing of asynchronous circuits. In Proceedings of the International Conference on Computer-Aided Design, pages 728-735, November 1997.

Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alex Saldanha, and Alexander Taubin. Delay fault testing of asynchronous sequential circuits. In Proc. of IWLS '97: International Workshop on Logic Synthesis, May 1997.

1996

 D. Avresky and J. Arlat. Functional programming for fault-tolerance. ISCA J. of Computers and their Applications, 1996.

D. Avresky, J. Arlat, J. C. Laprie and Y. Crouzet. Fault injection for the formal testing of fault-tolerance. IEEE Trans. on Reliability, September 1996.

K. Chakrabarty and J. P. Hayes. Test response compaction using multiplexed parity trees. IEEE Trans. on CAD, pp. 1399-1408, 1996.

K. Chakrabarty and J. P. Hayes. Balance testing and balance-testable design. J. of electronic Testing: Theory and Applications, pp. 71-86, 1996.

M.G. Karpovsky and V. N. Yarmolik. Transparent random access memory testing. JETTA, pp. 251-266, 1996.

Lev B. Levitin. On the quantum measure of information. Annales de la Fondation Louis de Broglie, pp. 345-348, 1996.

Lev B. Levitin, R. Gunther, B. Shapiro and P. Wagner. Zipf’s law and the effect of ranking … Int. J. of Theoretical Physics, pp. 395-417, 1996.

A Zakrevsky and L. Zakrevski. Test generation and diagnosis for EXOR- circuits. Doklady of the Academy of Sc. of Belarus, pp. 7-11, 1996.

L. Zakrevski. Superfast algorithm for canonical Reed-Muller form minimization for weakly defined systems of Boolean functions. Logic Design, pp. 76-85, 1996.

L. Zakrevski and V. N. Yarmolik. Synthesis of optimal signature analyzer for error detection in logic devices. Technical Cybernetics, pp. 126-130, 1996.

D. Avresky et al. Formal verification of protocols. Int. Workshop on Embedded Fault-Tolerant Systems, 1996.

S.J. Geoghegan and D. Avresky. Method for designing and placing check sets. Int. Symp. On Software reliability Engineering, 1996.

R. Wilkinson and D. Avresky. Implementation of a scalable reconfiguration algorithm. Int. Conf. On Massively Parallel Computing Systems, 1996.

S.J. Geoghegan ad D. Avresky. Design, verification and validation of self- checking software components. Int. Conf. On computers and Communications, 1996.

S. Gerber ad D. Avresky. Evaluation of software diversity for detecting hardware faults. Int. On-line Test Workshop, 1996.

K. Chakrabarty, M. G. Karpovsky and L. Levitin. Fault-tolerant multiprocessor systems. Workshop on Fault-Tolerant and Distributed Systems, 1996.

M. G. Karpovsky, D. Das and H. Vardhan. BIST for detection of coupling-faults. Int. Workshop on Memory Tech., Design and Test, 1996.

L. Levitin. Energy cost of information transmission. Int. Workshop on Physics and computation, 1996.

L. Levitin. Energy requirements in quantum communication. Quantum Structures, 1996.

N. Margolus and L. Levitin. Quantum computational dynamics. Int. Workshop on Quantum Computation, 1996.

L. Zakrevki. Detection of stuck-at faults in AND/EXOR combinational circuits. Int. Conf. On Mathematics and Informatics, Kishinev, pp. 123, 1996.

A. Kondratyev, M. Kishinevsky, A. Taubin, and S. Ten. A structural approach for the analysis of Petri nets by reduced unfoldings. In International Conference on Application and Theory of Petri Nets, Proc. 17th Int. Conference, volume 1091 of Lecture Notes in Computer Science, pages 346-365, Osaka, Japan, June 1996. Springer-Verlag.

A. Taubin, A. Kondratyev, M. Kishinevsky, and S. Ten. Deadlock prevention using Petri net unfoldings. In Computational Engineering in Systems Applications. CESA '96 IMACS/IEEE/SMC Multiconference, pages 426-431, July 1996.

A. Taubin, A. Kondratyev, and M. Kishinevsky. Deadlock prevention by Petri nets transformations. In Proc. of IEICE Concurrent Systems Technology Conference, CST-96, Aizu-Wakamatsu, Japan, May 1996.

1995

K. Chakrabarty and J. P. Hayes. Cumulative balance testing … IEEE Trans. on VLSI Systems, pp. 72-83, 1995.

M. G. Karpovsky. Applications of spectral techniques for off-line testing. Berichte zur Angewandten Informatik, 1995.

M. G. Karpovsky, T. D. Roziner and C. Moraga. Fault detection in multiprocessor systems … IEEE Trans. on Computers, pp. 383-393, 1995.

K. Chakrabarty, B. T. Murray and J. P. Hayes. Optimal space compaction of test responses. Int. test Conf., pp. 834-843, 1995.

V. N. Yarmolik, Y. V. Bykov and M. G. Karpovsky. Test sets for internal access testing. Int. Conf. On CAD, pp. 131-141, 1995.

 M. G. Karpovsky and V. N. Yarmolik. Testability measures and test complexities. Int. Workshop on IDDQ Testing, pp. 9-14, 1995.

L. Levitin. Single-error-correcting codes for magnetic recording. Int. Symp. On Inf. Theory, 1995.

L. Levitin and F. S. Vainstein. Bit-shift error correction in (d,k) codes. AAECC, 1995.

L. Zakrevski. Control flow error detection with signature analyzers. Int. Conf. On CAD of Discrete Devices, pp. 165-168, 1995.

L. Zakrevski. Combining concurrent error detection with off-line test. On-line Testing Workshop, pp. 201-205, 1995.

L. Kazarjan and Zakrevski L. Using random test generation for the diagnostics. Int. Mixed Signal Testing Workshop, pp. 92-94, 1995.

L. Zakrevski. Calculation of multiple sets of weights for scan- based random testing. Int. Conf. “Gronics-95”, pp. 43-46, 1995. 

S. Ten, A. Kondratyev, M. Kishinevsky, and A. Taubin. Software tool offering Petri net unfolding construction. In Proceedings of the 16th International Conference on Application and Theory of Petri Nets. Tool presentation, Torino, Italy, June 1995

Books and Book Chapters

K. Chakrabarty, M. Karpovsky and L. Levitin. Fault isolation and diagnosis in multiprocessor systems with point-to-point communication links. Fault- Tolerant Parallel and Distributed Systems, Kluwer Academic Press, 1998.

D. Avresky and D. Kaeli, eds. Fault-Tolerant Parallel and Distributed Systems, Kluwer Academic Press, 1997. D. Avresky and D. Kaeli. On-line fault recovery for wormhole routed two- dimensional meshes. Fault-Tolerant Parallel and Distributed Systems, Kluwer Academic Press, 1997.

D. Avresky and D. K. Pradhan. Fault-Tolerant Parallel and Distributed Systems, Computer Society Press, 1995. L. Levitin. Optimal quantum measurements for pure and mixed states. Quantum Communication and Measurements, 1995.